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朱红兵
5.0我来评喜爱度
所在大学:武汉科技大学
所在院系:计算机科学与技术学院
所在地区:湖北
所在城市:武汉
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朱红兵老师介绍
朱红兵(Hongbing ZHU)
楚天学者、教授、博士生导师
E-mail: shu-kohe@ieee.org
URL: http://www.cs.hkg.ac.jp/labs/kohe-shu/my-cv-cn/
学习经历
u 1993 年 4 月 - 1996年3月 日本国立熊本大学自然科学研究院系统科学专业(研究生, 获工学博士学位)
u 1985 年 9 月 - 1988年7月 中国武汉科技大学信息工程学院自动化系工业自动化专业(研究生, 获工学硕士学位)
u 1978 年 9 月 - 1982年7月 中国武汉科技大学信息工程学院自动化系(本科, 获工学学士学位)
工作经历
u 2004 年 4 月 - 现在 日本广岛国际学院大学信息学院计算机科学系 教授(硕士、博士导师)
u 2000 年 4 月 - 2004年3月 日本广岛国际学院大学工学院计算机科学系 副教授(日本文部省导师资格审查合格,硕士、博士导师)
u 2000 年 4 月 - 2004年3月 日本国立熊本大学特聘教师
u 1997 年 10 月 - 2000年3月 日本国立熊本大学综合信息中心 助教
u 1996 年 4 月 - 1997 年 9 月 日本国立熊本大学工学院 助教
u 1992 年 4 月 - 1993 年 3 月 日本国立熊本大学工学院特别外国人客座研究员
u 1991 年 5 月 - 1992 年 3 月 日本九州东海大学工学院特别外国人客座研究员
u 1988 年 6 月 - 1991 年 4 月 中国武汉科技大学信息工程学院自动化系 讲师
u 1982 年 8 月 - 1988 年 5 月 中国武汉科技大学信息工程学院自动化系 助教
协会会员
u IEEE (The Institute of Electrical and Electronics Engineers, Inc.)
u IEEE-CS (IEEE Computer Society)
u IEEE-CIS (IEEE Computational Intelligence Society)
u WSEAS (World Scientific and Engineering Academy Society)
u 日本电子信息通讯学会 (The Institute of Electronics, Information and Communication Engineers, IEICE)
u 日本神经网络学会 (Japanese Neural Network Society, JNNS)
u 日本信息学会 (Information Processing Society of Japan, IPSJ)
u 日本电气学 (The Institute of Electrical Engineers of Japan, IEEJ)
委 员
Chairman, WSEAS Japan Chapter on Intelligence and Informatics
研究领域
计算智能科学(Computational Intelligence Science)
新型计算智能算法
计算智能算法的高速化
计算智能算法的硬件实现
计算智能的应用
主持的主要实验室
并行智能计算实验室
计算机&网络智能管理系统实验室
论 文
收录:(检索日期:2005 年 4 月 5 日)
SCI (检索时段:1999-2004): 8 篇
EI (检索时段:1990-2004):14 篇
ISTP(检索时段:1996-2004): 4 篇
[国际会议论文志论文(Proceedings of International Conference)]
1. “One Intrusion Detection System with Fuzzy Control Model”Proc. of the 20 Commemorative International Technical
Conference on Circuits/Systems, Computers and Communications, Vol.4, pp.1277-1278, 2005.
2. “An IC Chip of A Dickson-Type DC-DC Converter with Bootstrapped Gate Transfer
Switches”
Proc. of 2004 IEEE International Conference of Analog and Digital Techniques in
Electrical Engineering, pp.77-80, 2004.
3. “A Switched-Capacitor DC-DC Converter with Various Stepped-Down Outputs” Proc. of 2004 IEEE International Conference of Analog and Digital Techniques in Electrical Engineering, pp.37-40, 2004.
4. “A DC-AC Inverter Using Switched-Capacitor Techniques”
Proc. of 2004 International Symposium on Nonlinear Theory and its Applications, pp.435-438, 2004.
5. “Design of a Ring-Type SC DC-DC Converter for Diode-Lamps in Cellular Phones” Proc. of 2004 International Symposium on Nonlinear Theory and its Applications, pp.439-442, 2004.
6. “A Charge-Average SC DC-DC Converter for Cellular Phone”
Proc. of International Symposium on Nonlinear Theory and its Applications, pp.443-446, 2004.
7. “A Neural Network Model of the Parallel Mechanism of Chromatic Channel” Proc. of the 2004 International Technical Conference on Circuits/Systems, Computers and Communications, pp.8D2L.1.1-8D2L.1.4, 2004.
8. “A Dickson-type power converter with bootstrapped gate transfer switches” Proc. of the 25th International Telecommunications Energy Conference, pp.623-626,2003.
9. “A switched-capacitor DC-AC converter using PAM method”
Proc. of the 2003 International Technical Conference on Circuits/Systems, Computers and Communications, Vol.2, pp.1374-1377, 2003.
10.“An IC chip of a communication-aid circuit to detect eye-gazed patterns” Proc. of the 2003 International Technical Conference on Circuits/Systems, Computers and Communications, Vol.2, pp.1109-1112, 2003.
11.“A synthesis of a random-switching controller using chaos generators” Proc. of the 2003 International Technical Conference on Circuits/Systems, Computers and Communications, Vol.2, pp.844-847, 2003.
12.“Design of a step-up/step-down SC DC-DC converter with series-connected capacitors”
Proc. of the IEEE International Symposium on Circuits and Systems, Vol.3, pp. III 300-303, 2003.
13.“A Ring-Type SC DC-DC Converter with Bootstrapped Gate Transfer Switches” Proc. of International Symposium on Nonlinear Theory and its Applications, pp.191-194, 2002.
14.“An IC Chip of a Cell-Network Type Circuit Constructed with 1-Dimensional Chaos
Circuits”Proc. of the 2002 International Technical Conference on Circuits/Systems, Computers and Communications, Vol.3, pp.2000-2003, July 2002.
15.“A Cell-Network Type SC DC-DC Converter with Large Current Output” Proc. of the 2002 International Technical Conference on Circuits/Systems, Computers and Communications, Vol.2, pp.1121-1124, July 2002.
16.“Design of a Communication-Aid Circuit to Detect Eye-Gazed Patterns” Proc. of the 2002 International Technical Conference on Circuits/Systems, Computers and Communications, Vol.1, pp.470-473, July 2002.
17.“Parallel Implementation of One Boltzmann Machine's Algorithm”
Proc. of the 2002 International Technical Conference on Circuits/Systems, Computers and Communications, Vol.1, pp.265-268, July 2002.
18.“A cell-network type SC DC-DC converter”
Proc. of the IEEE CAS Workshop on Wireless Communications, Vol.1, pp.1025-1029,2001.
19.“A CMOS realization of a switched-capacitor DC-DC converter for mobile devices” Proc. of the 5th World Multi-Conference on Systemics, Cybernetics and Informatics, Vol.1, pp.1100-1103, 2001.
20.“An FPGA Implemented Circuit Estimating Chaotic Signals from Approximated
Nonlinear Functions”
Proc. of the 2001 International Technical Conference on Circuits/Systems, Computers and Communications, Vol.2, pp.704-707, 2001.
21.“Design of a Digital Chaos Circuit with Array Structure”
Proc. of the 2001 International Technical Conference on Circuits/Systems, Computers and Communications, Vol.2, pp.608-611, 2001.
22.“A Simple Design of a 1-Dimensional Chaotic IC Using SI Techniques” Proc. of the 2001 International Technical Conference on Circuits/Systems, Computers and Communications, Vol.2, pp.596-599, 2001.
23.“Synthesis and Analysis of a Communication-Aid Circuit to Detect Eye-Gazed
Patterns”
Proc. of the 2001 International Technical Conference on Circuits/Systems, Computers and Communications, Vol.2, pp.390-393, 2001.
24.“A Parallel Algorithm of Boltzmann Machine”
Proc. of the 2001 International Technical Conference on Circuits/Systems, Computers and Communications, Vol.2, pp.1122-1124, 2001.
25.“An Improvement of Boltzmann Machine”
Proc. of the 2001 International Technical Conference on Circuits/Systems, Computers and Communications, Vol.2, pp.1115-1117, 2001.
26.“A Current-Mode Neuron-Fuzzy Circuit Extrapolating Chaotic Signals From
Reconstructed Nonlinear Functions”
Proc. of 2000 International Symposium on Nonlinear Theory and its Applications, Vol.1, pp.293-296, 2000.
27.“A Neuro-Fuzzy Based Circular Pattern Recognition Circuit Using Current-Mode
Techniques”
Proc. of 2000 International Technical Conference on Circuits/Systems, Computers and Communications, Vol.2, pp.1029-1032, 2000.
28.“A Neuro-Fuzzy System Reconstructing Nonlinear Functions from Chaotic Signals” Proc. of 2000 International Technical Conference on Circuits/Systems, Computers and Communications, Vol.2, pp.1021-1024, 2000.
29.“Discrete-Time CNN Using Chaos Circuits with Nonlinear Function
Controllability”
Proc. of 2000 International Technical Conference on Circuits/Systems, Computers and Communications, Vol.2, pp.1017-1020, 2000.
30.“Design of a High-Dimensional Discrete-Time Chaos Circuit with Array
Structure”
Proc. of 2000 International Technical Conference on Circuits/Systems, Computers and Communications, Vol.1, pp.211-214, 2000.
31.“CMOS-Based Fuzzy Operation Circuit Using Binary-Coded Redundantly-Represented
Positive-Digit Numbers”
Proc. of 2000 International Technical Conference on Circuits/Systems, Computers and Communications, Vol.1, pp.195-198, 2000.
32.“A Simple Approach of Improving Back-Propagation Algorithm”
Proc. of 2000 International Technical Conference on Circuits/Systems, Computers and Communications, Vol.2, pp.1041-1044, 2000.
33.“A New Training Algorithm for Multilayer Neural Networks”
Proc. of The 1999 International Technical Conference on Circuits/Systems, Computers and Communications, Vol.I, pp.201-204, 1999.
34.“A Proof of Convergence of Asynchronous Boltzmann Machine”
Proc. of The Fifth International Conference on Neural Information, Vol.1, pp.522-525, 1998.
35.“A Parallel-Processing Structure for the Sequential Boltzmann Machine” Proc. of The 1998 International Technical Conference on Circuits/Systems, Computers and Communications, Vol.2, pp.1041-1044, 1998.
36.“Implementation of a parallel algorithm in Boltzmann machine” Proc. of IEEE International Conference on Neural Networks, Vol.4, pp.3956-3960, 1994.
37.“An approach of sequential-like parallel algorithm in Boltzmann machine” Proc. of IEEE International Symposium on Circuits and Systems,
Vol.6, pp.439-442, 1994.
[快报(Letters)]
1. “A 1-dimensional Chaotic IC Designed by SI Techniques” Trans. IEE of Japan, Vol.123-C, No.9, pp.1663-1664, 2003.
2. “A Ring-type SC DC-DC Converter with Series-Connected Capacitors” Trans. IEE of Japan, Vol.123-C, No.3, pp.623-624, 2003.
3. “An FPGA-implementable chaos circuit with array structure” Trans. IEE of Japan, Vol.122-C, No.3, pp.523-524, 2002.
4. “A Current-mode feature extraction circuit based on fuzzy scheme” Trans. of IEEJ, Vol.120-C, No.5, pp.769-770, 2000.
5. “Simple Design of a Discrete-Time Chaos Circuit Realizing a Tent Map” IEICE Trans. Electron., Vol.E83-C, No.5, pp.777-778, 2000.
[译文(Translations)]
1. “Realization of Low Sensitivity in the Hopfield Model for Optimal-Solution
Search” Electronics and communications in Japan, Vol.82, No.12, pp.43-53, 1999.
2. “Introducing a Parallel Transit Evaluation Method Into the Sequential Boltzmann
Machine”Electronics and communications in Japan, Vol.81, No.12, pp.55-65, 1998.
3. “Frequency Divider Based on Miller Integral Type SC Astable Multivibrator”
Electronics and communications in Japan, Vol.77, No.8, pp.64-72, 1994.
[学报/学术讨论会(Aulletins/Memoirs)]
1. “Binary-Coded Redundantly-Represented Positive-Digit Number Adder and Subtracter Due to the Multiple Connection for Current Superposition” Proceeding of Symposium of Electronics, ECT-100-50, pp.57-62, 2000.
2. “Analysis of Asymptotic Convergence about Asynchronous Boltzmann Machine” MEMOIRS OF THE FACULTY OF ENGINEERING,
KUMAMOTO UNIVERSITY, Vol.XXXXI, No.2, pp.1-9, 1996.
3. “Synthesis of Boltzmann machine emulator with usual microprocessors” Technical Report of IEICE, NC 92-78, pp.71-75, 1992.
4. “An n-valued generator based on the integral type multivibrator”
Bulletin of School Engineering, Kyushu Tokai University·No.18, pp.17-25, 1991.
5. “The PRBS signal generating and data acquisition system”
Journal of Wuhan Iron and Steel University, Vol.13, No.3, pp.322-326, 1990.
[学术年会(Lectures)]
1. “An N-Values Signal Generator Using Integral Type Astable Multivibrator” Proceeding of the 1992 IEICE Spring Conference, Engineering Sciences·No.A-24, Part1, p.24.
2. “An N-Values Signal Generator Using Integral Type Delay Circuit”
Proceeding of the 1992 IEICE Spring Conference, Engineering Sciences·No.A-23, Part 1, p.23.
3. “A proposition of Differential type multivibrator in An N-Valued Generator” Record of 1991 Joint Conference of Electrical and Electronics Engineers in Kyushu·No.238, p.98, 1991.
4. “A proposition on the application of an integral type multivibrator in an n-valued generator”
Record of 1991 Joint Conference of Electrical and Electronics Engineers in
Kyushu·No.237, p.97, 1991.
●[译文]
[1][2][3]是 3 编日文论文(参看“论文”的[学会论文志论文][20][21][22])的英译论文。它登载于 学术杂志 Electronics and communication
s in Japan。此学术杂志是由本部在美国的世界著名出版公司 John Wiley & Sons (http://www.wiley.com),从日本最大的学会“日本电子信息通讯学
会(IEICE)”的日文论文学术 杂志中,挑选一些日文论文并译成英文,向世界介绍为目的发行的专门学术杂志。
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